The following commonly assigned patent/patent applications are hereby incorporated herein by reference:
The instant invention pertains to semiconductor device fabrication and processing and more specifically to a method of fabricating a tungsten layer.
In sub-quarter-micron ultra-large scale integrated circuits (ULSIs), a low-resistivity gate electrode is required to reduce limitations on the speed of MOS devices due to the gate RC delay time. Tungsten-polycrystalline silicon gate structures have lower sheet resistance than conventional poly or policide gates. Because tungsten reacts with silicon at temperature as low as 600xc2x0 C., it is critical to have a high quality diffusion barrier between tungsten and silicon. WNx and TiN are candidates as the diffusion barriers between tungsten and polycrystalline silicon to avoid silicidation of the tungsten film. Structures using WNx have the advantage of using selective oxidation to repair etch damage to the gate oxide.
Thermal chemical vapor deposition (CVD) of tungsten is an important process for depositing tungsten films used as conductors in integrated circuit devices. This step is, typically, performed as:
WF6+H2xe2x86x92W+HF
However, this process needs to have a nucleation layer in order to have adequate deposition rate and uniformity. Conventionally, a SiH4+WF6 step is used for depositing a nucleation layer for subsequent thermal CVD-tungsten formation. However, for thin tungsten layers, e.g. less than 100 nanometers thick, such as in tungsten-polycrystalline silicon gate stacks, the incorporation of silicon in the nucleation layer causes higher sheet resistance. This becomes particularly undesirable for future devices because the trend for future devices is to have gates with smaller gate lengths and lower resistivity.
Because the SiH4+WF6 step is thermally driven, the nucleation property is substrate dependent. This results in rough surface morphology on certain substrates, such as WNx. Rough surface morphology is not desirable because it will affect the subsequent patterning steps required for fabricating gate structures.
One embodiment of the instant invention utilizes a plasma enhanced chemical vapor deposition (PECVD) tungsten step to replace the silane-initiated nucleation step in prior methods. The method of the instant invention can be used to form a conductive gate structure which is comprised of tungsten or a tungsten/polycrystalline silicon (herein referred to as poly or polysilicon) stack, a via or interconnect which is comprised of tungsten, or any other conductive structure which is comprised of tungsten. One embodiment of the instant invention is a process used to form tungsten-poly stacks which is comprised of the following steps: (1) deposition of a layer of poly or amorphous silicon on gate dielectric-covered substrate; (2) deposition of a thin layer of WNx; (3) deposition of a thin layer of PECVD tungsten and (4) deposition of thermal CVD tungsten.
An advantage of the invention is that the nucleation layer can be deposited on a wide range of substrates due to the PECVD advantage. Another advantage of the invention is that incorporation of Si into the nucleation layer is eliminated. This improves the sheet resistance of the tungsten layer, particularly when the tungsten layer is thin. Another advantage of the invention is the low equipment cost. WNx, PECVD tungsten and thermal CVD tungsten can all be performed using the same chamber. In addition, CVD tungsten chambers are already widely available in semiconductor fabs worldwide. Another advantage of the instant invention is that high throughput can be achieved for low resistance wordline stack fabrication. Both the barrier and the tungsten structure can be performed in the same chamber using one single sequence and therefore the process overhead is greatly reduced. Another advantage of the invention is that the gate structures thus formed can use selective oxidation for removing etching damage to gate oxide.
An embodiment of the instant invention is a method of fabricating an electronic device formed over a semiconductor substrate and having a conductive feature comprised of tungsten, the method comprising the steps of: forming a nucleation layer over the semiconductor substrate by introducing a combination of WF6, H2 and a plasma; and forming a tungsten layer on the nucleation layer by means of chemical vapor deposition. In an alternative embodiment, an insulating layer is formed on the substrate and situated between the nucleation layer and the substrate. Preferably, this embodiment additionally includes the step of forming a nitrogen-containing layer under the nucleation layer by introducing a combination of WF6, N2, H2, and a plasma. The conductive feature is, preferably, a conductive gate structure, and the insulating layer is, preferably, comprised of: an oxide, a nitride, an insulating material with a dielectric constant substantially higher than that of an oxide, and any combination thereof.
In another alternative embodiment, the nucleation layer is formed over a conductive gate structure which is insulatively disposed over the semiconductor substrate. Preferably, this embodiment also includes the step of forming a nitrogen-containing layer under the nucleation layer by introducing a combination of WF6, N2, H2, and a plasma.
In another alternative embodiment, a dielectric layer is formed between the nucleation layer and the semiconductor substrate, the dielectric layer having openings which has sides extending from the top of the dielectric layer to the bottom of the dielectric layer, and the nucleation layer is situated on top of the dielectric layer and on the sides of the openings of the dielectric layer. Preferably, this embodiment additionally includes the step of forming a nitrogen-containing layer between the nucleation layer and the dielectric layer by introducing a combination of WF6, N2, H2, and a plasma. The dielectric layer is, preferably, comprised of: HSQ, BPSG, PSG, aerogel, xerogel, an oxide, a nitride, and any combination thereof.
Another embodiment of the instant invention is a method of fabricating a chemical-vapor deposited tungsten-containing layer over a semiconductor substrate, the method comprising the steps of: forming a nitrogen-containing layer over the semiconductor substrate by introducing a combination of WF6, a nitrogen-containing gas, H2, and a plasma; and forming a nucleation layer on the nitrogen-containing layer by introducing a combination of WF6, H2 and a plasma. Preferably, the temperature of the semiconductor substrate is around 400 to 500 C.